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    Solid State and Hybrid Circuit Breakers

    T26.5 - Parallel Half-Bridge SiC-SSCBs with Optimized Busbar: Lower Overshoot, Lower Conduction Losses

    Thursday, March 26, 2026
    9:40 AM - 10:00 AM CT
    Location: 214B
    This paper introduces two SiC-SSCB layouts that share a low-loss parallel half-bridge conduction path but differ in clamp/commutation geometry: (1) a line-to-line clamp (Topology 1) and (2) a bus-referenced MOV clamp with an optimized low-inductance busbar (Topology 2). Measurements at 1.4 kV DC show turn-off stress dominated by loop inductance; Topology 2 shrinks the commutation loop (~5 nH vs ~85 nH), cutting VDS overshoot from ~3.5 kV to ~3.0 kV while preserving ≈50% conduction-loss reduction.