This session provides an overview of a novel workflow to optimize transistor selection in power conversion topologies based on electrical simulation and vendor component data. This work is inspired by the current trend for high power density data center power supplies and the practice of using multiple semiconductor technologies at different stages of the design (GaN, SiC and Si). A typical system includes an Interleaved Totem Pole PFC on the front-end and an LLC Converter with active rectification in the back-end both which are the subjects of this case study. The focus of this workflow is transistor technology selection. This workflow automatically performs multiple simulations with GaN, SiC and Si devices in different configurations and in different stages along both topologies, optimizing for thermals, cost and surface area.
