SPICE-based simulators are commonly deployed for estimating semiconductor switching losses, however such detailed models are often too slow for complete system analysis and are intended for a specific operating point. An alternative method deploying ideal semiconductor switch models with high resolution lookup-table (LUT) data for switching and conduction loss estimation over a wide range of operating conditions yields fast and robust simulations. As major device manufacturers increasingly support such LUT models for direct application in commercial software tools, designers can not only predict performance and efficiency, but also quickly investigate tradeoffs of topology selection, different components and their drive circuits and control schemes, confidently size cooling systems, and predict device lifetime reliability. This presentation will give a high-level overview highlighting the LUT approach's benefits as well as provide insights into future-looking opportunities.
