Zero turn-off loss (ZTL) or near-ZTL has gained increasing interest in zero voltage switching (ZVS) topologies to minimize switching losses, as both turn-on and turn-off switching losses approach zero. ZTL can be obtained at low switching currents under ZTL switching conditions as the switching current solely charges the SiC MOSFET output capacitance, Coss, and does not generate any joule heating in the SiC MOSFET during the turn-off switching event. Extending the ZTL switching conditions to higher switching currents can be achieved by gate voltage boosting during the turn-off switching event to obtain faster switching speeds by increasing the SiC MOSFET gate current. This paper validates, through LTspice simulations and preliminary experimental results, an extended ZTL region for SiC MOSFETs with the use of gate voltage boosting. The preliminary experimental results obtained through double pulse testing show a reduction of 10-15% in the turn-off energy under non-ideal boosting voltage.
