This paper presents a power stage design for a 2 kV SiC full-bridge converter, minimizing parasitic inductance while meeting thermal, isolation, and mechanical constraints. Using cost-effective 2 kV SiC discrete devices in a side-by-side and back-to-back configuration optimizes current distribution and reduces switching transients. A dual local decoupling capacitor structure and strategically placed DC-link capacitors suppress voltage overshoot and extend capacitor lifespan. Flux cancellation within interleaved PCB layers and multiple parallel decoupling capacitors enhance electromagnetic compatibility. Advanced thermal management with aluminum nitride (AIN), phase-change materials, pressed rubber, and optimized heatsinks ensures better efficiency. A 60 kW Active-Front End (AFE) prototype at 50 A and 1.5 kV validates reduced loop inductance, voltage overshoots less than 17% in a continuous test, and improved performance, making this approach ideal for scalable SST with medium voltage DC (MVDC) extreme fast charging (XFC) stations.
