Dynamic voltage scaling (DVS) is critical for improving energy efficiency in processor power supplies. However, in high-performance servers, large output capacitance and high load current severely limit the DVS slew rate, causing overshoot and undershoot in conventional implementations. This paper proposes a point-to-point, time-optimal DVS scheme that calculates ON/OFF times from the current and target voltages to achieve near-theoretical slew rates without overshoot or undershoot. Large transitions are divided into stages to avoid overcurrent failure. Verified in a 1 MHz four-phase VRM with 6.648 mF capacitance, the scheme maintains the set 30mV/μs slew rate under various amplitudes with <10mV fluctuations, while commercial controllers respond at <20 mV/μs with >50 mV fluctuations
