D23.3 - Inverter Leg with Vertical Interconnection and Integrated Shielding: Opportunity for Vertical WBG Power Components

Thursday, March 26, 2026

12:00 PM - 1:45 PM CT

Location: Hemisfair Ballroom

Technical Dialogue Presenter(s)

Mahery Rajemisaona

Univ. Grenoble Alpes, CNRS, Grenoble INP, G2ELab, 38000 Grenoble, France

Presentation

Co-Author(s)

Pierre-Olivier Jeannin, PhD

G2Elab, Université Grenoble Alpes
VB

Vincent Bley

LAPLACE, Université de Toulouse, CNRS, INPT, UPS, Toulouse, France
MP

Mickael Petit

Institut Lafayette, Metz, France
FN

Fabien Ndagijimana

Univ. Grenoble Alpes, CNRS, Grenoble INP, G2ELab, 38000 Grenoble, France

This article details the conception of an inverter leg with vertical interconnection and integrated shielding based on silicon MOSFET. Shields with constant voltage bias are used to shield semiconductors in order to minimize values of common mode capacitor. It allows to reduce common mode coupling. Shielded and unshielded inverter legs are compared and a reduction of the common mode current was observed up to -10dB with a shielded packaging. Printed circuit boards (PCBs) are used as dielectric substrates and electrical conductors. A discussion on the relevance of this structure for vertical WBG power components is presented.