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    Datacenter (including AI) / Telecom Power Architecture & System Considerations

    D09.6 - Interleaved Resonant FCML Converter Architecture for Scalable Vertical Power Delivery in High-Performance Computing Systems

    Thursday, March 26, 2026
    12:00 PM - 1:45 PM CT
    Location: Poster 9
    Next-generation high-performance computing (HPC) systems demand power delivery solutions exceeding 1 kW per chip and >1 A/mm² current density, which places significant strain on conventional lateral power delivery architectures due to high lateral routing losses. Vertical power delivery architectures with integrated voltage regulation, typically realized through a two-stage, 48-to-12-to-1 V, conversion scheme, have emerged as a promising alternative. This work presents a dual-channel interleaved resonant flying capacitor multi-level (ReFCML) converter for efficient 48-to-12 V first-stage conversion, scalable to 1 kW, enabling high-efficiency, high-power-density vertical power delivery for HPC systems. In this digest, simulation results for the interleaved ReFCML design at 1 kW load power are presented, demonstrating a projected efficiency of 97.8% and a power density exceeding 2 W/mm², along with preliminary experimental validation at 80 W. A comprehensive efficiency analysis and full experimental validation at 1 kW will be reported in the final paper.