This paper introduces a novel Cascaded H-Bridge (CHB)-based Solid-State Transformer (SST) topology that reduces the number of medium-frequency transformers and semiconductor devices while preserving high modularity. The proposed architecture features an interphase connection of multiport dc–dc converters with the CHB submodules, where Multiport LLC (MLLC) converters serve as the building blocks of the dc–dc stage. Operating in dc-transformer mode, the MLLC enables high efficiency and reduced system complexity. The paper details the topology operation principle and design, including the ac–dc and dc–dc stages. The proposed architecture is validated through a 1.5 MW simulation and a 2.5 kW experimental prototype. Experimental results show that dc-voltage deviations are below 1%, indicating that component mismatches have a limited impact on system performance. A peak efficiency of 93% is achieved for the combined ac–dc and dc–dc stages.
